CDMA bus-based on-chip interconnect infrastructure
نویسندگان
چکیده
منابع مشابه
CDMA bus-based on-chip interconnect infrastructure
As technology scales toward deep submicron, the integration of complete system-on-chip (SoC) designs consisting of large number of Intellectual Property (IP) blocks (cores) on the same silicon die is becoming technically feasible. Until recently, the design-space exploration for SoCs has been mainly focused on the computational aspects of the problem. However, as the number of IP blocks on a si...
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The integration of complete Network-on-chip (NoC) designs consisting of large number of Intellectual Property (IP) blocks (cores) on the same silicon die is becoming technically feasible. But, the communication between the IP Cores is the main issue in recent years. This paper presents an On-Chip interconnect mechanism as a component of Code Division Multiple Access (CDMA) for shared bus archit...
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The Network-on-chip (NoC) designs consisting of large pack of Intellectual Property (IP) blocks (cores) on the same silicon die is becoming technically possible nowadays. But, the communication between the IP Cores is the main issue in recent years. This paper presents the design of a Code Division Multiple Access (CDMA) based wrapper interconnect as a component of System on programmable chip (...
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ژورنال
عنوان ژورنال: Microelectronics Reliability
سال: 2009
ISSN: 0026-2714
DOI: 10.1016/j.microrel.2009.02.002